1. Technical Field
The present invention relates to a power semiconductor device.
2. Description of the Related Art
In a power semiconductor device in addition to US 2011-0180813 A, a termination area is used for the purpose of supporting a withstand voltage by applying a separate structure in order to prevent concentration of an electric field of an active cell edge portion in a high withstand voltage element, and a widely used structure is a ring structure or the ring structure and a poly field plate structure.
The power semiconductor device having the above-described structure is required to secure a wide termination area in order to obtain a required withstand voltage in a method in which P-layers with a predetermined interval therebetween are connected with each other and expansion of a depletion layer is increased when an off mode is operated.
However, the increase in the width of the termination area causes a reduction in an active region having the same chip size when an on mode is operated, to thereby cause an increase in conduction loss, an increase in heat generation of the device, or an increase in production costs due to an increase in a chip size in order to maintain the same active region area.
Therefore, there is a demand for a power semiconductor device that can reduce a size while maintaining a withstand voltage.